When a device is powered on, memory elements may be in random states, which can cause undesirable effects on the device. Thus, many devices include a power-on reset (POR) circuit for detecting a supply voltage and for asserting a reset signal to place memory elements into a known state. For example, a POR circuit may assert a reset signal with a rising supply voltage and de-assert the reset signal after a first voltage, or trip point is reached. In addition, a POR circuit may re-assert the reset signal when a falling supply voltage reaches a second trip point voltage, either as a result of a transient in the supply voltage or when the device, and hence the supply voltage, is turned off. In many existing designs, the trip points exhibit a wide spread, or variation, across process corners and consume significant power. One type of POR circuit with narrower trip point variation is based upon a band gap reference circuit and a generic comparator. However, this type of design occupies a large chip area and is complex in nature.